The terms "error scrub" and "error scrubbing" mean the process of detecting and correcting errors in an error detection and correction (EDAC) protected memory system although data transfers to and from memory may not occur over extended periods of time. If a soft error (i.e., an error due to radiation-induced bit switching) occurs in memory, the error scrubbing system reads memory, corrects the error and then writes the corrected data back to the memory. The EDAC process helps to reduce the likelihood of non-correctable failures occurring due to multiple soft errors.
Current error scrubbing utilizes DRAM (dynamic read access memory) refresh cycles to perform the error scrubbing operation. In these conventional error scrubbing systems, if no error is detected, a refresh cycle consists only of a read cycle. If an error is detected, conventional memory scrubbing systems must execute a read-correct-write cycle. This type of memory scrubbing system and method has a negative effect on system performance because it increases the time consumed by memory read cycles or read-modify-write cycles in comparison to a normal refresh cycle. Furthermore, the negative impact is constant because the refreshes or scrub cycle requests must be performed periodically.
Conventional EDAC systems and methods also prevent the use of column address strobe (CAS) before row address strobe (RAS) refresh and elimination of the refresh address counter. Conventional error scrubbing techniques also complicate memory controller design by requiring a simple refresh cycle to be translated into a complex memory cycle.
Therefore, there exists a significant need to perform error scrubbing on memory other than during refresh cycles so that time consumed by the error scrubbing does not negatively impact system design and performance.